Assembler Test Essay Research Paper Nick RobertsonAssembeler free essay sample

Assembler Test Essay, Research Paper Nick Robertson Assembeler Class: Take place trial 1.What are the four stairss of CPU executing are: 1 ) Fetch op codification or immeiate informations 2 ) increase IP 3 ) decode op and or put to death 4 ) travel to step 1 2.List all the 8086 registry province their prupose. Group them by general intent, indicating, and section. They are: General Registers: axAccumilator ( general purpose storage ) bxPointer to memory cxCounting ( input/output references ) dxData ( shop info about peripherals The chief intent of the above started registries is to incorporate the initaial information for, and the reslts of, arithmetic or logical instructions. Indicating Registers: diDdiestintaion index siSource index spstack arrow bpBase arrow The chief intent of the above stated registries is to indicate to other countries in memory. Segment- sc Code section dsData section ss Extra section The chief intent of the above stated registries is to keep sections of information. 3 ) List all the 8086 flags and province their intent. We will write a custom essay sample on Assembler Test Essay Research Paper Nick RobertsonAssembeler or any similar topic specifically for you Do Not WasteYour Time HIRE WRITER Only 13.90 / page Group them by by province or control, they are: State Flags: State flags are so named becouse their values are influenced by the cherished intructions and reflect some pecularities as a consequence. AFAuxiliary CarryFlag CFCarry Flag OFOverflow Flag PDParity Flag SFSign Flag ZFZero Flag Control Flag: Control Flags are so named becouse their pupose is to command the executing of certain intructions. IFInterrupt Flag TFTrap Flag DFDirection Flag 4 ) Define Ram and Rom ROM # 8211 ; Read Merely Memory -Perminent non-volitale ( is kept at shut-down ) RAM # 8211 ; Random Access Memory -Changable -Volitable ( is non kept at shut-down ) 5 ) State and specify the three coachs used by the CPU. besides province if the coach is unidirectional or bidirectional. They are: Address-Bidirectional hardware Data -Bidirectional Sends info ( Carrys info every bit good ) Control-Unidirectional Mouse, Keyboard, etc # 8230 ; # 8230 ; 6 ) A plan that will take a individual figure numeric input from the computing machine, convert it to BCD, ass the figure, and end product the consequence to the proctor. .Model .stack 100h .code Start: mov ah, 01h Int 21h mov ax, 001h cmp Al, 09h Jnz convert ; jnz = leap non zero mov ax, 4C00h int 21h stop start Convert add ax, 01h ; add 1 if over 9 ret 7 ) State the difference between a macro and a process. Macro # 8211 ; Copies code a compilating / inserts Procedure # 8211 ; Jumps to in struction in memory 8 ) Give exaples of the following addresing manners: Register # 8211 ; mov ax, cx Indirect # 8211 ; mov ax, 6000h mov Ds, ax Direct # 8211 ; mov ax, [ 0123h ] Indexed # 8211 ; mov ax, [ bx + di ] 9 ) Specify the undermentioned assembly program directives: Extern # 8211 ; External to current codification Public # 8211 ; Can be called ( internal ) Global # 8211 ; Combination of both 10 ) For every # 8216 ; push # 8217 ; there is a # 8216 ; pop # 8217 ; 11 ) Write a plan that will code a twine by XORing one character with the following character in the twine. .Model tiny .Data grab dubnium # 8220 ; this # 8221 ; .code start: mov ax, @ information mov Ds, ax lea bx, grab lea Si, grab stinc: Iraqi National Congress Si xor [ bx ] [ Si ] ; [ T ] [ H ] Iraqi National Congress bx comp Si, 03h jne stinc mov ax 4ch int 21 stop start 12 ) Write a plan that will decode the plan you merely wrote. .Model tiny .Data grab dubnium # 8220 ; this # 8221 ; .code start: mov ax, @ information mov Ds, ax lea bx, grab lea Si, grab lea dx, toinc add bx, 04h add Si, 04h stinc December Si xor [ bx ] [ Si ] December bx cmp Si, dx jne stinc int 21 stop start 13 ) State the reference 5F32A of the following op-code as a metameric reference, a logical reference. Give the beginning reference and the section reference. 5F32and displacement to compensate 500000= F32A 14 ) List all the base-pointers registries and give the segmants that they can utilize. Label the default segmen register with each. Don # 8217 ; t bury about IP # 8211 ; Ip must partner off with Cs, sp with US Secret Service becouse these regiesters are involved in automatic CPU operations.Then you can partner off the all-purpose informations indicating registries BX, Di, and SI with the informations section registry DS # 8211 ; The IP offset register is ever buttockss to the CS section registry when turn toing codification memory. There is override available to the coder. # 8211 ; The BP or SP offset registry is automatically added to the SS section registry when stack opertions are in advancement. The coder may non overrule the automatic choice of SS with SP. The coder may overrule the automatic choice of the DS registry and utilize anyone of the other three section registries CS, ES, or SS. # 8211 ; Any offset measure utilizing registries BX, DI, and Si is automaticlly added to the DS base registry. The coder may overrule the automatic choice of the DS registry and utilize any one of the other three section registeres CS, ES, or SS. # 8211 ; The beginning registry DI is automaticlly used with the ES base registry when stringoperations are taking topographic point. The coder may non overrule the choice of Di with ES when threading operations are done. 15 ) Give an illustration of a struct that will hive away the informations for a individual age, tallness, and weight. HEALTH STRUCT age dw 0h height+dw 0h weight+dw 0h wellness terminals